| [News] Transcript of Alan Redhouses speech at AmiGBG 2003 | ANN.lu |
| Posted on 31-Mar-2003 19:40 GMT by Peter Gordon | 54 comments
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I have transcribed Alans AmiGBG speech. It can be viewed here.
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| Transcript of Alan Redhouses speech at AmiGBG 2003 : Comment 42 of 54 | ANN.lu |
| Posted by Anonymous on 02-Apr-2003 16:03 GMT | In reply to Comment 40 (IanG):
>Motorola and IBM *who designed the chip we're talking about* probably do have a
>fairly good clue about cache system designs. And they say you should see 3%.
Again - where does IBM say that?
Apple is (was?) part of AIM alliance and has the most experience when it comes
to desktop computer systems (MOT concentrates on embedded appliances).
Apple say on http://www.apple.com/powermac/architecture.html :
"L3 cache keeps the PowerPC G4’s engine stoked
L3 cache is high-speed Double Data Rate memory. It provides fast access to data
and application code through a dedicated bus to the processor. This dedicated
bus provides throughput of up to 4 gigabytes per second (GBps), and is completely
unhindered by any other data transfers. The high speed made possible by L3 cache,
with its dedicated bus, allows the PowerPC G4 processor to receive data more
than five times faster than it could from main memory (where a shared bus
lowers speed). Because of this low latency, the G4 processor is constantly fed
with data. So it doesn’t just sit idle, waiting for the next set of data to arrive." |
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