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[News] What a PPC linux kernel hacker thinks about the ArticiaANN.lu
Posted on 14-Jun-2004 23:52 GMT by JohnV68 comments
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Here's what Benjamin Herrenschmidt, a respectable linuxPPC kernel hacker thinks about the Articia. <A HREF="http://lists.debian.org/debian-powerpc/2004/06/msg00430.html">Here is some interesting thread about the Articia. Note that Benjamin Herrenschmidt is a clued linuxPPC kernel hacker with lot of experience. Here's what he thinks about the Articia "features":

It's basically incompetent northbridge design.

No, that means the HW is a Piece Of Shit !

Cache coherency is a basic feature of anything claiming to be used as a desktop machine.

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Comment 1not this again...14-Jun-2004 22:07 GMT
Comment 2Joe "Floid" Kanowitz14-Jun-2004 22:37 GMT
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What a PPC linux kernel hacker thinks about the Articia : Comment 50 of 68ANN.lu
Posted by Thomas Frieden on 16-Jun-2004 07:24 GMT
In reply to Comment 2 (Joe "Floid" Kanowitz):
> Anyone know what "BAT" decrypts to

Block Address Translation.

The PPC's MMU has two possibilities for handling memory mapping: A full MMU page table, and BAT registers. If maintaining an MMU table is too much work (or costs too much memory), you can use BAT registers.

Basically, you can just say "map a block of size x from address v to address p, with the following access restrictions". You have 4 pairs for data addresses, and 4 pairs for instruction addresses (some chips, like the 7457 and 750FX have 8 pairs each).
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#52 Anonymous
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