[Unmoderated] ArticiaS: mystery finaly solved ? | ANN.lu |
Posted on 08-Jul-2004 06:47 GMT by brotheris | 140 comments View flat View list |
Here's the summary of the last posts from hot topic. It may finaly put some dots on I's. Up to now we have heared a lot of small bits from variuos parties and finaly we can put the puzzle together. Read more about it.
I'll play Amon_Re of the past:
It all started when Chris Hogdes started explaining few things (in this thread and @226 comment).
During DMA transfers, the ArticiaS does not flag accessed memory as "dirty", therefore the CPU does not automatically know, that it has to update/flush its caches
Later (@ comment 247, 248 and others) Bernie Meyer explained how such a lack of feature (or call it a bug) affects stability, performance and may cause data corruption even in AmigaOS-like enviroment while using CachePreDMA()/CachePostDMA().
And then we discover quotes from ArticiaS documentation:
"The snoop cycle is used to probe the primary and secondary cache for updated data when the PCI
accesses DRAM. This is done to maintain data coherency between the Floating Buffer, DRAM and both
caches. The Articia S performs the Snoop cycle. When there is a snoop hit on a modified cache line in
either level one or two cache, the contents are written back directly to the Floating Buffer. A PCI Bus
master can subsequently later on fetch the data directly from the Floating Buffer. The Floating Buffer is
flushed back to DRAM during a PCI write cycle. The corresponding line in level one or level two cache is
thus invalidated. Snoops are hidden, meaning the CPU can continue its current data access without
being interrupted while the Articia S simultaneously queries both caches."
You can find similar information using google cache. It seems like some people lied. Is lack of Cache Coherency a bug or a feature (it was advertised that there is Cache Coherency, so it had to work) ? We may now put this case to rest.
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ArticiaS: mystery finaly solved ? : Comment 107 of 140 | ANN.lu |
Posted by Sammy Nordström on 11-Jul-2004 10:43 GMT | In reply to Comment 105 (Johan Rönnblom): >But - all I'm saying is that people shouldn't buy an A1 if they expect
>working DMA, unless someone shows that the DMA actually works. Since
>you expect this to be proven "soon", do you have a problem with this
>recommendation?
First of all, you are not the one to turn to for recommendations about the AmigaOne to begin with, period. You do realize that, right?
Second of all, I have not made any mention of within which time period the AmigaOS4 is going to be released in it's final end user version. I'm just saying that either you wait, find another way to prove your theory or simply keep your theories to yourself. The choice is yours, just stop making these claims without facts to back it up.
Thirdly, I have a problem with your "recommendation" since you are claiming that it is broken without facts that supports your claim. Or, are you saying that I'm free to go around making baseless claims about bugs in the design of the Pegasos in all Amiga and Pegasos related online websites and forums?
Since we don't have proof wether it is broken or not, why make a recommendation to begin with? How about if someone would ask you about wether your opinion about the AmigaOne, you simply answer; "don't ask me, I don't know" or "well, I prefer product x so I'm really not the right person to ask"? Really, why would you *have to* make any claims or recommendations when you obviously don't know anything of your theories as a matter of fact to begin with? |
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