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[Web] New CPU's from freescaleANN.lu
Posted on 21-Aug-2004 13:32 GMT by PPC27 comments
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Arstechnica has an article about an upcoming dual core G4 (e600) from Freescale which will scale beyond 2GHz.
Freescale is also working on a 32/64bit G5 (e700) class CPU. This new G4 class CPU should feature an on-board memory controller capable supporting DDR2, and a gigabit ethernet controller.
New CPU's from freescale : Comment 1 of 27ANN.lu
Posted by Chain-Q on 21-Aug-2004 15:01 GMT
There were rumours about that Motorola "G5" class CPU around 2001... So i believe it when i see. And it seems that the dual core G4 is targetting the embedded, or maybe the mobile target only, at least the integrated gbit eth controller makes me think that. We'll see. I hope these are not only rumours this time...
New CPU's from freescale : Comment 2 of 27ANN.lu
Posted by Anonymous on 21-Aug-2004 15:37 GMT
It would be rather useless to to use this CPU in an AmigaOne or Pegasos. The FSB can't deliver the amount of bandwidth needed by the two cores. I wonder if freescale will design a new northbridge.
The someone can design a new mobo with using the on chip memory controller and the northbridge connected with RapidIO.
New CPU's from freescale : Comment 3 of 27ANN.lu
Posted by Anonymous on 21-Aug-2004 18:52 GMT
In reply to Comment 2 (Anonymous):
>The FSB can't deliver the amount of bandwidth needed by the two cores.

What bandwidth exactly? Is your harddisk faster than the FSB?
New CPU's from freescale : Comment 4 of 27ANN.lu
Posted by Johan "Hagge" Krüger-Haglert on 21-Aug-2004 19:49 GMT
Enough data from the RAM to keep the CPUs occupied.
New CPU's from freescale : Comment 5 of 27ANN.lu
Posted by Anonymous on 21-Aug-2004 20:23 GMT
In reply to Comment 4 (Johan "Hagge" Krüger-Haglert):
It would be foolish not to use the integrated ramcontroller, how about soldering the e600 SOC in place of the northbridge and then keep the
cpu slot for auxilliary CPU/DSP? ;-)
New CPU's from freescale : Comment 6 of 27ANN.lu
Posted by JoannaK on 22-Aug-2004 05:12 GMT
In reply to Comment 5 (Anonymous):
Freescale have designed and implements nice SD/DDRAM and PCI controllers on their embedded stuff (see 5200 for example, it even has build in ide and ethernets) for some time now, It would make a lot sense to use those on their next gem CPU:s and finally drop decade old MPX/603 bus ...
New CPU's from freescale : Comment 7 of 27ANN.lu
Posted by Johan "Hagge" Krüger-Haglert on 22-Aug-2004 06:59 GMT
In reply to Comment 5 (Anonymous):
"It would be foolish not to use the integrated ramcontroller, how about soldering the e600 SOC in place of the northbridge and then keep the
cpu slot for auxilliary CPU/DSP? ;-)"

They talked about the Pegasos and AmigaONE, and I guess a dual-core G4 with integrated memory controller on the CPU-card wouldn't matter on any of them since it wouldn't change the design of the board.

Weird that they do this thought, since the G4 is such an expensive CPU anyway, why not use a more modern expensive CPU in that case? But then again I'm not the one to say if the G5 is much more modern or if it's just 64-bit.
New CPU's from freescale : Comment 8 of 27ANN.lu
Posted by Anonymous on 22-Aug-2004 07:54 GMT
In reply to Comment 2 (Anonymous):
Of course it would take a new Pegasos design to fully make use of the on-board ram controller and ethernet. Pick one:

http://www.genesi.lu/olp.php?slide=8
http://www.genesi.lu/olp.php?slide=9

:-)
New CPU's from freescale : Comment 9 of 27ANN.lu
Posted by Anonymous on 22-Aug-2004 07:56 GMT
In reply to Comment 5 (Anonymous):
That would be cool! :-)
New CPU's from freescale : Comment 10 of 27ANN.lu
Posted by Anonymous on 22-Aug-2004 07:57 GMT
In reply to Comment 6 (JoannaK):
"and finally drop decade old MPX/603 bus ... "

I fully agree!
New CPU's from freescale : Comment 11 of 27ANN.lu
Posted by Anonymous on 22-Aug-2004 17:44 GMT
Hey, what about this...you keep the basic Pegasos design and use the normal DDR Ram as "Chipram" and then have the brandnew e600 dualcore CPU with DDR2 "Fastram" together on the CPU card - either soldered on or with a SODIMM expansion socket? :->
New CPU's from freescale : Comment 12 of 27ANN.lu
Posted by Olegil on 22-Aug-2004 18:58 GMT
In reply to Comment 11 (Anonymous):
Congratulations, you succeeded in introducing higher latency for graphical programs. Why is it so bad to buy a new motherboard once in a while?
New CPU's from freescale : Comment 13 of 27ANN.lu
Posted by Anonymous on 23-Aug-2004 03:23 GMT
In reply to Comment 12 (Olegil):
>Congratulations, you succeeded in introducing higher latency for graphical programs.

I fail to see where a higher latency is introduced for "graphical programs".
The (dual-)CPU itself would profit tremendously from a low latency high bandwidth
local RAM, though (it has no L3 cache anymore).

>Why is it so bad to buy a new motherboard once in a while?

Nothing? Except they are:
a) expensive
b) non-existant
New CPU's from freescale : Comment 14 of 27ANN.lu
Posted by Olegil on 23-Aug-2004 05:02 GMT
In reply to Comment 13 (Anonymous):
You would put your graphics card out of reach of the fastest memory. So all graphical applications would have to run from "chip memory". How can you not see the downside to this? It's what we've been suffering with for years and years already?

Accelerators are bad. Unless they only contain a large CPU and a (large) external cache. Everything else goes on the PCI side of the motherboard, so the devices can talk to each other directly without bothering the CPU with it.
New CPU's from freescale : Comment 15 of 27ANN.lu
Posted by priest on 23-Aug-2004 07:09 GMT
In reply to Comment 14 (Olegil):
"You would put your graphics card out of reach of the fastest memory."

The real limitation would be the AGP 1x slot of Peg2.

"So all graphical applications would have to run from "chip memory"."

I think not, why would GFX apps need to use the motherboard RAM?
It might be more clear to name the motherboard ram as "slow mem" than "chip mem". Or perhaps "TEMP mem"or "VMEM SWAP disk" would be better...

"It's what we've been suffering with for years and years already?"

But perhaps the name "chip memory" limits you from realising the meaning of that extra motherboard ram.

"Accelerators are bad. Unless they only contain a large CPU and a (large) external cache."

Isn't 1Gb of DDR2 just a "large external cache", really.
New CPU's from freescale : Comment 16 of 27ANN.lu
Posted by priest on 23-Aug-2004 07:12 GMT
In reply to Comment 15 (priest):
+ I think the only real bad thing with this kind of Peg2 accelerator is that it will cost (at least) as much as Peg3...
New CPU's from freescale : Comment 17 of 27ANN.lu
Posted by priest on 23-Aug-2004 07:24 GMT
In reply to Comment 16 (priest):
+ IMO, the advantages of an accelerator:
- you do not need to setup the whole system again (and to find & cure all NEW HW/driver bugs)
- you can continue to use your existing HW (and SW that might be dongelized to your previous HW)
- it's cool or should I say geeky


And you might get rid of that extra spare cash...
New CPU's from freescale : Comment 18 of 27ANN.lu
Posted by Anonymous on 23-Aug-2004 07:44 GMT
In reply to Comment 14 (Olegil):
"You would put your graphics card out of reach of the fastest memory. So all graphical applications would have to run from "chip memory"."

Like todays situation you mean = no change to the worse?
New CPU's from freescale : Comment 19 of 27ANN.lu
Posted by Anonymous on 23-Aug-2004 19:57 GMT
http://www.theregister.co.uk/2004/08/18/dual-cores_detailed/
New CPU's from freescale : Comment 20 of 27ANN.lu
Posted by hammer on 23-Aug-2004 19:59 GMT
In reply to Comment 15 (priest):
Cache usually copies a subset of data from the main memory pool.
New CPU's from freescale : Comment 21 of 27ANN.lu
Posted by priest on 24-Aug-2004 03:15 GMT
In reply to Comment 20 (hammer):
Yes I know.

I know that DDR2 would not be handled as a real huge CPU cache on such an accelerator.

But AmigaOS is flexible like rubber, it should be the same for MOS.
So, there should not be any problem to tell the OS how to specificly use that RAM.
It can be set that apps are given memory from the fastest part untill it ends or the slower memory is preserved to some specific use, etc, etc.
That has been done numerous times before, on Amigas, already.
New CPU's from freescale : Comment 22 of 27ANN.lu
Posted by Olegil on 24-Aug-2004 08:41 GMT
In reply to Comment 21 (priest):
Ok, smartypants. How would the AGP or a PCI slot address this 1G of memory through the northbridge?

It wouldn't. You would have to do all PCI/AGP operations from the slower memory, which means a BIT more than just setting up priorities on memory. You would have to specifically allocate memory from THAT pool to do DMA, and applications which didn't would do what applications written for an unexpanded A500 did when people started putting fast mem into their systems. Fuck up, then die.

If it contained only cache, not real memory, then it would work. There is a HUGE difference between a chip series like m68k and powerpc when it comes to this. The m68k didn't need a northbridge, because all the peripherals just mapped into different parts of memory and all memory was accessible from the CPU. With the powerpc comes PCI and AGP, which cannot (ok, technically they can, but noone does it :-) ) be mapped directly into memory, so needs a bridge of some sort. So now the northbridge handles all the address mappings between different peripherals. How would a byte from the IDE interface be routed into memory located on the FSB? The NB and the FSB hasn't been designed to route data that way, except as cache snoops (and the ArticiaS doesn't even do cache snoops).

So cache, yes. Memory, no. It's just not practical to put memory on that bus.

Please prove me wrong.
New CPU's from freescale : Comment 23 of 27ANN.lu
Posted by Anonymous on 24-Aug-2004 21:49 GMT
In reply to Comment 22 (Olegil):
The 7457 can deal with the L3 cache as 4MB of private memory, I have no clue about the capabilities of the e600 integrated memory controller, but maybe it could be used in a similar fashion?
New CPU's from freescale : Comment 24 of 27ANN.lu
Posted by hammer on 25-Aug-2004 01:16 GMT
In reply to Comment 21 (priest):
IF e600 + memory sockets + PCB board pretty much equals north board design; therefore it only needs a south board. Amiga style kit-bash wouldn't look pretty against Motorola’s reference designs.
New CPU's from freescale : Comment 25 of 27ANN.lu
Posted by priest on 25-Aug-2004 06:59 GMT
In reply to Comment 22 (Olegil):
>Ok, smartypants.

:)

>How would the AGP or a PCI slot address this 1G of memory through the northbridge?

Not sure if it would be that crusial for AGP GFX card with lot of memory, but I think I did not take into account the PCI DMA. It would most likely work only to the motherboard RAM.

>It's just not practical to put memory on that bus.
>Please prove me wrong.

I think I agree (more) now... The solution would be pricey, kludge (add complexity) and for some parts the performance might suffer instead of improving.

The northbridge would need to be on the CPU card from/since the beginning (and still the new motherboard would be the cheaper solution).


(IMO. Dual CPU 68k+PPC cards were insane and non-practical, still they did it... Weird world, the Amigaworld.)
New CPU's from freescale : Comment 26 of 27ANN.lu
Posted by Olegil on 25-Aug-2004 15:11 GMT
In reply to Comment 23 (Anonymous):
But do you have an OS that can deal with it as memory?

Using cache as memory is really smart for embedded applications, but then you're talking INSTEAD of other memory, afaik.

Again, proove me wrong. I would be happy to see a working solution at a good price.
New CPU's from freescale : Comment 27 of 27ANN.lu
Posted by Olegil on 25-Aug-2004 15:13 GMT
In reply to Comment 25 (priest):
Dual m68k and PPC cards were done because they didn't have a fast enough emulator. Nowadays it woulda been much easier to just do a 604 on a card with an emulator (of course with escape possibilities) in a flash. But at that time they could utilise nearly 100% of one chip at a time and that was a good enough solution.
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