[Forum] Try only to realise the truth | ANN.lu |
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Try only to realise the truth : Comment 249 of 335 | ANN.lu |
Posted by Fabio Alemagna on 06-Jul-2004 13:46 GMT | In reply to Comment 240 (Ferry): > If I understood Chris explanation correctly, where he says the ArticiaS does not
> flag accessed memory as "dirty", therefore the CPU does not automatically know,
> that it has to update/flush its caches, Linux expects Articia to change that
> flag, but Articia doesn't do, so DMA transfers fail. I'm not an expert, but it
> seems not a case of 'non-coherent DMA' as Ben Herrenschmidt says, it seems that
> Linux drivers are simply not "synced" with Articia specs
What do you think "cache coherency means"? It means precisely that the CPU's cache is always coherent with what is going on on the various buses and in the main memory. That is, the cache does _never_ have to make it appear as if something is there which is not anymore.
As Mr. Herrenschmidt put it, it's basically an "incompetent northbridge design". |
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